ASIC Verification Engineer jobs in Serangoon

We are seeking a hands-on Design Engineer with experience in ASIC / SoC functional verification . The role involves building and executing SystemVerilog/UVM verification environments , writing test plans, running simulations, performing coverage analysis, and debugging RTL designs. Responsibilities Develop and maintain verification environments for IP and SoC designs Create constrained-random and...

Responsibilities Lead RTL design, simulation, and verification for company ASIC/SoC products, ensuring robustness. Integrate and validate IP blocks for seamless system functionality. Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs. Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout. Create and maintain...

A leading semiconductor company in Singapore is seeking a skilled Digital Design Engineer to join their R&D team. You will generate DFT instruments using advanced EDA tools and debug test patterns on ATE machines. The ideal candidate should have a Bachelor's or Master's degree in Electronics or Electrical Engineering, with over 5 years of digital DFT design experience and proficiency in scripting...

Our client is a smart automotive technology company focused on developing automotive-grade AI chips and integrated hardware–software solutions for intelligent cockpits, cabin–driving fusion, and on-device generative AI. They are expanding their IC engineering team and are hiring across Architecture, Design, and Verification functions to support the development of next-generation SoC products. Key...

A leading tech firm in Singapore is seeking a hands-on Design Engineer with strong experience in ASIC and SoC functional verification. The role involves building and maintaining verification environments, creating test cases, and automating verification flows using tools like Perl, TCL, or Python. Candidates must possess at least 3 years of relevant experience, solid knowledge of SystemVerilog...

Responsibilities Lead RTL design, simulation, and verification for company ASIC/SoC products, ensuring robustness. Integrate and validate IP blocks for seamless system functionality. Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs. Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout. Create and maintain...

We are seeking a hands-on Design Engineer with experience in ASIC / SoC functional verification . The role involves building and executing SystemVerilog/UVM verification environments , writing test plans, running simulations, performing coverage analysis, and debugging RTL designs. Responsibilities Develop and maintain verification environments for IP and SoC designs Create constrained-random and...

Responsibilities Lead RTL design, simulation, and verification for company ASIC/SoC products, ensuring robustness. Integrate and validate IP blocks for seamless system functionality. Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs. Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout. Create and maintain...

We are seeking a hands-on Design Engineer with experience in ASIC / SoC functional verification . The role involves building and executing SystemVerilog/UVM verification environments , writing test plans, running simulations, performing coverage analysis, and debugging RTL designs. Responsibilities Develop and maintain verification environments for IP and SoC designs Create constrained-random and...

Responsibilities Lead RTL design, simulation, and verification for company ASIC/SoC products, ensuring robustness. Integrate and validate IP blocks for seamless system functionality. Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs. Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout. Create and maintain...

We are seeking a hands-on Design Engineer with experience in ASIC / SoC functional verification . The role involves building and executing SystemVerilog/UVM verification environments , writing test plans, running simulations, performing coverage analysis, and debugging RTL designs. Responsibilities Develop and maintain verification environments for IP and SoC designs Create constrained-random and...

We are seeking a hands-on Design Engineer with experience in ASIC / SoC functional verification . The role involves building and executing SystemVerilog/UVM verification environments , writing test plans, running simulations, performing coverage analysis, and debugging RTL designs. Responsibilities Develop and maintain verification environments for IP and SoC designs Create constrained-random and...

We are seeking a hands-on Design Engineer with experience in ASIC / SoC functional verification . The role involves building and executing SystemVerilog/UVM verification environments , writing test plans, running simulations, performing coverage analysis, and debugging RTL designs. Responsibilities Develop and maintain verification environments for IP and SoC designs Create constrained-random and...

A leading tech firm in Singapore is seeking a hands-on Design Engineer with strong experience in ASIC and SoC functional verification. The role involves building and maintaining verification environments, creating test cases, and automating verification flows using tools like Perl, TCL, or Python. Candidates must possess at least 3 years of relevant experience, solid knowledge of SystemVerilog...

A leading tech firm in Singapore is seeking a hands-on Design Engineer with strong experience in ASIC and SoC functional verification. The role involves building and maintaining verification environments, creating test cases, and automating verification flows using tools like Perl, TCL, or Python. Candidates must possess at least 3 years of relevant experience, solid knowledge of SystemVerilog...

A leading tech firm in Singapore is seeking a hands-on Design Engineer with strong experience in ASIC and SoC functional verification. The role involves building and maintaining verification environments, creating test cases, and automating verification flows using tools like Perl, TCL, or Python. Candidates must possess at least 3 years of relevant experience, solid knowledge of SystemVerilog...

A leading tech firm in Singapore is seeking a hands-on Design Engineer with strong experience in ASIC and SoC functional verification. The role involves building and maintaining verification environments, creating test cases, and automating verification flows using tools like Perl, TCL, or Python. Candidates must possess at least 3 years of relevant experience, solid knowledge of SystemVerilog...

A leading tech firm in Singapore is seeking a hands-on Design Engineer with strong experience in ASIC and SoC functional verification. The role involves building and maintaining verification environments, creating test cases, and automating verification flows using tools like Perl, TCL, or Python. Candidates must possess at least 3 years of relevant experience, solid knowledge of SystemVerilog...

We are seeking a hands-on Design Engineer with experience in ASIC / SoC functional verification . The role involves building and executing SystemVerilog/UVM verification environments , writing test plans, running simulations, performing coverage analysis, and debugging RTL designs. Responsibilities Develop and maintain verification environments for IP and SoC designs Create constrained-random and...

A leading tech firm in Singapore is seeking a hands-on Design Engineer with strong experience in ASIC and SoC functional verification. The role involves building and maintaining verification environments, creating test cases, and automating verification flows using tools like Perl, TCL, or Python. Candidates must possess at least 3 years of relevant experience, solid knowledge of SystemVerilog...