RTL Design Engineer (ASIC/SOC/Verilog/System Verilog)
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HKM HR MANAGEMENT PTE. LTD.
Woodlands
Responsibilities Lead RTL design, simulation, and verification for company ASIC/SoC products, ensuring robustness. Integrate and validate IP blocks for seamless system functionality. Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs. Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout. Create and maintain... |
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11 hours ago
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